[mems-talk] About flatness of silicon wafers

Nodes Norbert N.Nodes at EVGroup.com
Fri Nov 30 03:46:21 EST 2007


Hello.

Besides SEMI standards (e.g. M1-0707 for polished Si wafers), there is
also the standard DIN 50441-5, which defines some more parameters, e.g.
LTV (local thickness variation), TIR (total indicated reading) and
others.

Best regards,

Norbert Nodes

n.nodes at evgroup.com
 
-----Original Message-----
From: mems-talk-bounces at memsnet.org
[mailto:mems-talk-bounces at memsnet.org] On Behalf Of Andrea Mazzolari
Sent: Donnerstag, 29. November 2007 22:01
To: mems-talk at memsnet.org
Subject: [mems-talk] About flatness of silicon wafers

Hi All,
I'm interested to flat silicon wafers. Which are the parameters which
quantify flatness of a silicon wafer ? I know meaning of TTV, warp and
Bow.
Is there something else which is specifing flatness of a silicon wafer ?



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