[mems-talk] Query related to oxide nitride stack deposition on a silicon wafer

[Anurag Tripathi]

Hello,

I have been trying to deposit an oxide-nitride stack on a silicon  
wafer for my research. So far I have made two depositions and in both  
of them, the nitride layer is found to be having multiple cracks.

The two deposition sequences were as following:

1. Deposition of 2 micro LTO (using LPCVD) followed by deposition of  
1.2 micron LPCVD nitride

2. Deposition of 2 micron HTO (using LPCVD) followed by deposition of  
0.9 micron LPCVD nitride and subsequent annealing for 1 hour at 950  
degree celcius.

In both the cases, I observed nitride layers to having multiple cracks  
rendering them useless for subsequent photolthographic and etching  
steps.

For our application, we desire an oxide nitride stack with oxide  
thickness ~ 2 microns and nitride thickness to be anything between  
0.7-1.0 micron.

I wanted to ask if anyone of you has had a similar issue and what  
could be a possible remedy?

(I don't have a low stress nitride facility and so I have to do with  
LPCVD nitride)

Thank you very much,

Anurag Tripathi
Department of Mechanical Engineering,
University of Michigan
Ann Arbor