Dear all,
I realized from your response that my previous posting was a little bit
unclear.
I am posting it again with more details:

I am trying to etch Si3N4/SiO2 membranes in 100 Si wafer.
My layer stack is as follows:
Si3N4   100nm
SiO2    2.5micron
Si
SiO2    2.5micron
Si3N4   100nm

The Si02 and Si3N4 layers are both on the topside and
bottom-side of the wafer. I etch holes in the layers on
one side to get the Si3N4 membrane on the other side.

The Si3N4 layer is removed by the RIE , while  SiO2 in BHF
and then etched in KOH to produce the window membrane.
Unfortunately, each time I repeat my process the membranes brake
before the topside SiO2 layer is etched away.

I realize that the cause of this can be related to the stress in the oxide
layer.
Could someone suggest a good solution to this problem?

Thanks

Maryla

Ps Thanks to all who responded and provided some advise.