You may want to push the wafers into the furnace with a 1-2% O2 in the N2.
Bare wafers can get N2 pitted if subjected to high temp N2.  If QSS isn't a
problem (usually isn't except for gate oxidation in MOS devices), you should
be able to pull in  O2.  For MEMS operations where deep silicon etching is
going to be done, oxidation induced defects can be a problem.  They can also
mess up electrical junctions.  Schumacher (now Air Products) sells some
stuff (Trans-LC (Trans 1,2-Dichloroethylene)that will take care of the
oxidation induced defects. Here is a
link:http://www.airproducts.com/productfinder/ProductFinderResults.aspx

Roger Brennan
3060 Reuben Drive
Reno, NV 89502
Home: rogerbr@earthlink.net
Home: 775-825-3060

Applications Director
Solecon Labs
770 Trademark Drive
Reno, NV 89521-5926
Work: roger@Solecon.com
Work: 775-853-5900 ext 108


-----Original Message-----
From: mems-talk-bounces@memsnet.org
[mailto:mems-talk-bounces@memsnet.org]On Behalf Of Martin J Prest
Sent: Thursday, March 09, 2006 2:04 AM
To: General MEMS discussion
Subject: RE: [mems-talk] Thermal Growth silicon dioxide


For oxide growth rate, see this:

http://ee.byu.edu/cleanroom/OxideThickCalc.phtml

Select 'wet' for steam oxidation.

I'm not an expert in this, but I guess wafers should be loaded and removed
in a nitrogen atmosphere.