Hi all,

     In my process, i have Si/SiO2/Aluminum structure..... Aluminum is
patterned. Now i wish to deposit Cr on top this arrangement and make Al and
Cr non-overlapping (This is mainly to avoid intermetalics or say, galvanic
etching of lesser noble metal, which is aluminum in this case. Actually, I
tried this method since i don have standardized recipe for lift-off method
in our lab. i tried for lift-off, but, i cudnot get success using S1813).

These are my process details.,

1) After Al deposition (Thermal Evaporation), i did pattern transfer (+ve
resist, S1813) using a mask (Say, mask 1). Prebake - 30 min @ 90 deg
celcius. Post bake@ 120 deg celcius.

2) After the lithography, i did not strip the resist, since i wish to
deposit Cr on top it (Resist is fully covering my aluminum interconnecting
lines)...

3) Cr is thermally deposited. Here, Cr is deposited on top of previous
photoresist  and on top of SiO2. During Cr deposition, substrate heating of
100 deg celcius was given for better adhesion.

4) Then Using another mask, (Say mask-2) i did lithography (S1813).Prebake
and Postbake parameters are same as in previous case.  After Cr etching, now
I wish to strip both the resists, i.e. resist used during Al lithography and
resist used during Cr lithography so that i can get a non-overlapping Cr and
Al on top of SiO2 and hence galvanic etching of Al in Cr etchant can be
avoided during further processing.
The resist used during second lithography i.e Cr lithography was completely
stripped out in acetone @ 40 deg celcius... But, the resist used during
first lithography, i.e. Al lithography, which is now on top of Al
interconnect lines, is not completely removed, even after 60 min.  When
examined in a optical microscope, it is observed that still some resist is
sticking to the Al surface. I tried out ultrasonic agitation, but it didnt
work....

I guess the reason for this problem may be the excessive heat treatment
given to the resist spun during first lithography.  Can anyone give me some
suggestion to overcome this problem.

Thanx in advance....

Regards,
A. Ravi Shankar,
Research Scholar,
Microelectronics Centre,
E&ECE Deptt / Advanced Technology Centre,
IIT Kharagpur, India.