durusmail: mems-talk: This is known as RIE Lag RE: XeF2 etching of Si
XeF2 etching of Si
2009-02-21
2009-02-22
This is known as RIE Lag RE: XeF2 etching of Si
2009-02-22
2009-02-23
2009-02-23
2009-02-25
2009-02-25
This is known as RIE Lag RE: XeF2 etching of Si
junjun wu
2009-02-23
Hi Edward, no plasma is used in the XeF2 process. As you and Mehmet pointed
out in his comment, this seems to be a universal effect for dry etching,
which I think might have something to do with how fast the resulting SiF4
can be removed from the surface. I wonder if there are any ways to alleviate
it, such as dilution of the XeF2 vapor, temperature control, or in stead of
static XeF2 soaking using a constant flow over wafer surface ... Thanks.
Junjun

On Sat, Feb 21, 2009 at 7:50 PM, Edward Sebesta  wrote:

> The problem you are describing is known as RIE Lag. It isn't unique to
> XeF2 etch nor is it due to the gas inlet holes.
>
> There is an excellent paper which covers this issue and an overview of
> more advanced plasma etching at IBM.
>
> http://www.research.ibm.com/journal/rd/431/armacost.html
>
> Search for the term RIE lag. Or aspect ratio. It is a long paper.
>
> You don't mention whether you are using a diode/triode plasma or an
> inductively coupled plasma (High density plasma etching).
>
> Edward H. Sebesta
> Independent Semiconductor/MEMS Engineer

--
Junjun Wu
Twin Creeks Technologies
Phone: 408-759-1426
Fax: 408-986-9142
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