In my experiment, sputtered Ti/Au works well as a protection layer in TMAH. We make resistance in the active layer of SOI wafer. After the contact holes are etched by BOE, Ti/Au(800/3000A) layer is deposited by sputtering. Then we remove Ti/Au layer near the edge of the wafer to make sure the reserved Ti/Au is electrical insulated from the substrate silicon by BOX oxide (the reason why do this will be discussed later, See $$$$). After that, we back etch the wafer in TMAH (80C 25%) for 20 hours. Finally, The Ti/Au layer is etched to be metal wires and it works well. $$$$: If we do not remove the Ti/Au layer on the edge of the wafer, the Ti/Au is electrical contact with the silicon substrate which we want to etch. In this case, TMAH do not etch the silicon. This may be caused by primary cell effect. In another experiment with ordinary wafer, P+ was implanted on N type silicon to form resistance. Then Ti/Au(800/3000A) layer is sputtered and etched to be wires. After 18 hours TMAH etching, The Ti/Au wires contact with resistance is etched (As shown in attachment), while the isolated wires on the oxide is good as shown attachment. We attribute this phenomenon to be primary cell effect.