durusmail: mems-talk: E-beam step coverage
E-beam step coverage
2009-06-25
2009-06-28
E-beam step coverage
Edward Sebesta
2009-06-28
There are three key factors here to consider.

1. What is the pinhole integrity of your deposited film?
2. What is the topology of the BST Film?
3. What type of step coverage can you accomplish with your Evaporator.

I. Pinhole integrity of your deposited film.

During deposition there is a phase where the film is non-continuous,
then at some point it is continous. For a variety of different reasons
and causes, the film can have defects, also called pinholes, a slang
term, in which acid, base, or some other medium can penetrate and attack
the underlying medium. At some thickness of deposition there are no
pinholes. This is best determined by doing a pinhole test.

Deposit the SiO2 film on another film, or a silicon wafer. Then subject
it to an acid or base or some other chemical that won't etch the SiO2 at
all or very little, but will etch the underlying film or substrate, and
overetch it considerably. There are many possible combinations that you
can use. This will create a large defect in the underlying film or
substrate that will be easy to find and count.

If you have too many defects, thicken your deposited film and test
again. For efficiency I would do a series of film thicknesses and then
etch them all at once.

Particles are one serious source of pinhole defects and lack of
cleanliness. Make sure your system and substrates are clean.

II. & III. What is the topology of the BST Film and What type of step
coverage can you accomplish with your Evaporator.

These two questions and issues are somewhat interrelated.

You can detune the evaporator to have ionization, and an excessively
large vapor cloud where the e-beam hits the target. This will cause some
step coverage.

However, lets assume the worst case, and assume that the deposit will
come down like "snow." That is the deposit will be vertical down
perpendicular to the substrate and there will be no sidewall coverage.

In this case you will need thickness such that at the corners of the
topology you will have the minimum thickness as determined in No. I
above. If there is a slope you will need a thickness such that the
thickness perpendicular to the slope is sufficient to not have pinholes.
If there is an abrupt step, the thickness will have to be enough that it
is higher than the step plus additional thickness such that the diagonal
distance from the top edge of the abrupt drop is greater than the
minimum thickess.

If you have large steps in the topology, this probably isn't workable.
You will have to work on your deposition so there is some sidewall
deposition, that is the flux of deposition isn't entirely vertical.

However, if the side wall deposition is 50% of the field, then your
deposition in the field, flat areas, will have to be 2X the minimum
thickness not to have pinholes.

In Summary, the thickness will be dependent on your characterization of
the integrity of the deposited film and the minumum thickness to not
have pinholes and the nature of your deposition.

Modification of evaporation deposition conditions to have ionization and
a larger non-molecular vapor pressure region would help. Having
depositions there the wafers are tilted at different angles to the
evaporation flux would help sidewall coverage also. However, your
machine would have to be built to handle  different angling of
substrates.

Best of luck.

Edward H. Sebesta
Program Manager Hybrids Packaging Group VLSIP Technology



-----Original Message-----
From: mems-talk-bounces@memsnet.org
[mailto:mems-talk-bounces@memsnet.org] On Behalf Of Evelyn B
Sent: Thursday, June 25, 2009 8:47 AM
To: General MEMS discussion; Evelyn Benabe
Subject: [mems-talk] E-beam step coverage


Hi all,

I am planning on depositing an SiO film on top of a BST film and would
like to get an idea as to how thick I should make the SiO layer in order
to protect the BST layer.  I will be using e-beam evaporation for the
SiO deposition and I understand that it is not conformal.  Since I am
using SiO as a passivation layer and the film to be protected is 500 nm
thick, I would like to know if the SiO layer has to be larger than 500
nm or whether it can be smaller; say  400 nm.  Is there a rule of thumb
out there that would ensure good step coverage?

Thanks,

--
EVELYN BENABE
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