durusmail: mems-talk: anisotropic etching of silicon having aluminium pattern
anisotropic etching of silicon having aluminium pattern
2009-08-20
anisotropic etching of silicon having aluminium pattern
Yongliang Yang
2009-08-23
Maybe you can use Ti/Au wires instead of Al and etch the silicon by TMAH. It
works well in  our experiment.

2009/8/21 Mathieu Hautefeuille (UNAM) 

> It is possible to realise a front-etch as well, to avoid the problems
> encoutered with back-side etching.
>
> I have realised this with Al structures sitting on a SiO2 oxide layer
> deposited on an Si wafer. As explained in [1-3], the front-side of the
> wafer
> may be covered with a patterned resist material (AZ 9260) in order to
> achieve an anisotropic etch of the SiO2 oxide. This first step is very
> important as the resulting patterned oxide will act as an etch mask for the
> second step: an isotropic etch of the bulk silicon. In the design I had
> prepared "openings" running parallel to the devices (and through which the
> underetching is performed) periodically leaving gaps or bridges. These
> bridges of oxide will join the device to the wafer once the device has been
> underetched. The vertical etch rate of this process (down into the Si
> handle
> wafer) is approximately double the undercut etch rate (in one direction).
> Please note that although my final design had polyimide covering Al as
> well,
> this has been achieved succesfully with simpler devices as well for test
> purposes and with several opening widths.
>
> I hope this helps.
> *
> [1] M. Hautefeuille et al., "MultiMEMS sensor development",
> **Microelectronics
> Reliability* ,
> Volume
> 49, Issue 6<
> http://www.sciencedirect.com/science?_ob=PublicationURL&_tockey=%23TOC%235751%
232009%23999509993%231116121%23FLA%23&_cdi=5751&_pubType=J&view=c&_auth=y&_acct=
C000048981&_version=1&_urlVersion=0&_userid=945819&md5=ec877ac21850cfd1c8e1baf52
60a3e32
> >,
> June 2009, Pages 621-626.
>
> *[2] T. Healy et al, “Silicon Fibre Technology Development for Wearable and
> Ambient Electronics Applications,” Frontiers in Electronics Book, pp.
> 713-721, World Scientific Publishing Co. Pte. Ltd., June 2005, ISBN
> 978-981-256-884-7.
> [3] S. Frederico, C. Hibert, R. Fritschi, P. Fluckiger, P. Renaud, A.M.
> Ionescu, “Silicon Sacrificial Layer Dry Etching (SSLDE) for free-standing
> RF
> MEMS architectures”, Sixteenth IEEE Annual International Conference on
> Micro
> Electro Mechanical Systems, MEMS'03, Kyoto, Japan, 19-23 Jan. 2003.*
>
> --
> Mathieu Hautefeuille - Centro UNAMems, UNAM, México
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