durusmail: mems-talk: Thinnest Cr layer that can still successfully adhere Au to Si
Thinnest Cr layer that can still successfully adhere Au to Si
Thinnest Cr layer that can still successfully adhere Au to Si
Micro Fab
2009-09-04
Hi Mehmet,

5nm Cr should be sufficient for decent adhesion, but probably that's quite
close to lower limit (which maybe 2-3 nm), but it all depends on deposition
conditions as well.

As an example, years ago, I needed a very thin but continuous Au layer, and
after experimenting decided somewhere between 5-10 nm Au became continuous
(5 nm formed islands, 100 nm was continuous. I used  99.99% Au (a Swiss bank
certified gold coins to save money ;-)), thermally evaporated, ~2-3A/sec in
a Leybold box coater. Later on I had a chance to do AFM surface roughness on
my 10nm Au and another 10nm sample from a homemade evaporator (Au 99.999%,
rest of the conditions were unknown to me). 99.99% samples had a much higher
RMS roughness (don't remember exactly but were like 5nm vs 1nm of 99.999%).

I'm not sure how much role impurities might have played in roughness, but I
believe the homemade evaporator would have a lower thickness limit before
becoming discontinuous.

Similar arguments may apply to Cr.

Felix rightfully pointed out possibility of pinholes in Au, I agree with him
that could be the case, if you have an etchant (e.g. KOH) that can penetrate
through Au and etch what's underneath but not chrome, you can verify whether
that's the case. I tried to protect thin films from KOH by thick gold, and
found  500nm was barely sufficient (for a long through the wafer etch), any
thinner, KOH would attack underlying films.

I also believe that even if you have islands, and Cr etchant is seeping
underneath Au as you suspect, it most likely seep through even where you
don't have Cr, since Au does not adhere well. Also you did not mention how
larh=ge an area is lifting off, if it is few um, then undercut is likely,
but if you have patterns in hundreds of microns lifting off that will  mean
something else.

If you can dilute your Cr etchant, that may reduce a fast undercut etch (if
that's the case).

These are all i can think of right now

good luck
uF

On Fri, Aug 28, 2009 at 8:54 AM, Mehmet Yilmaz  wrote:

> Hello all,
>
> I am trying to stick Au on Si substrates.
> I am using 10nm Cr as adhesion layer between Au and Si.
>
> But I am not sure if the layer that I am depositing is pure Cr, or some Cr
> Oxide is also there. The crucible that I am using seems to be contaminated
> with Cr Oxide before I start my e-beam evaporation of Cr. Instead of having
> the gray shiny color of Cr, at some regions of the crucible I see a greenish
> color which is probably Cr Oxide...
>
> I do not see any serious adhesion problems after further processing of my
> wafers except the last release step to have free standing Au thin films. I
> see a problem when I insert my wafers into a Cr etchant. I am inserting my
> wafers into this Cr etchant to get rid of some of the Cr layer which is not
> covered with Au (This Au patterning is done in previous steps). But, during
> this etching process, I realized that the Cr etchant that I am using
> penetrates so fast from the Au-Si interface, the Au structure that I want to
> keep on top of my substrate peels.
>
> I suspect that, the capillary forces in the Au-Si interface are playing a
> strong role during that process and Cr adhesion layer is etched extremely
> fast because of that.
>
> I wonder whether 10nm Cr adhesion layer is a continuous film or not
> continuous?
>
> If 10nm Cr is a continuous layer, then I wonder how thin should be the Cr
> layer that I need to evaporate in order NOT to have a continuous Cr layer?
> This way, I believe I will be able to keep Au layer on my substrate because
> the Cr etchant that I am using will not be able to penetrate through the
> whole Au-Si interface because Cr adhesion layer will not be continuous...
> But, I am not sure if something less than 10nm Cr will be enough to have
> good adhesion between Au and Si...
>
> Do you have any suggestions?
>
> Thanks in advance,
>
> Mehmet Yilmaz
> Mechanical Engineer
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