durusmail: mems-talk: Local pinholes in parylene layer
Local pinholes in parylene layer
2009-09-16
Local pinholes in parylene layer
Nicolas Vergauwe
2009-09-16
Hi guys,

I'm working on systems where I use parylene as a dielectric. The parylene
thickness I used was 800 nm. Although the CVD process of parylene is known as
pinhole-free, I see frequently some pinholes in my dielectric layer (which is
not the same as breakthrough because most other places are ok). Therefore I
thought of depositing two parylene layers of 800 nm, where between the two
depositions I clean with piranha (3:1) to remove possible dust or contaminants.
But still the problem of pinholes persists.

Can you give me any comments or suggestions how to solve this nasty problem?
Could it be that something goes wrong during the etching of the parylene (to
free the contact pads so I can test my device)?

Thanks,
Nicolas

Katholieke Universiteit Leuven
Faculty of Bioscience Engineering
Department Biosystems (BIOSYST)
Division Mechatronics, Biostatistics, and Sensors (MeBioS)
Willem De Croylaan 42, box 2428
B-3001 LEUVEN

Tel: +32 16 32 06 93
Fax: +32 16 32 29 55
E-mail:
nicolas.vergauwe@biw.kuleuven.be
Web: www.biosensors.be
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