Hey folks,

anyone had experience of using SPR955 as an etching mask to Si? The
thickness of SPR955 will be ~700nm and I would employ SF6 RIE (or DRIE) to
etch ~2um of Si device layer of a SOI wafer.

I guess the selectivity might not be too bad. I'm a little concerned about
the hardening effect. RIE sometimes hardens the photoresist and the mask
could not be washed away. Does anyone know about this?

Thanks.

Jie