CMP is introducing Micro Electro Mechanical Systems (MEMS) fabrication based on
CMOS 1.0 micron DLM/SLP front side bulk micromachined by EDP at ESIEE. MEMS
like cantilevers, membranes, microbridges, etc... may be processed together
with the electronics. Design rules have been defined, available to designers
upon signature of a Confidentiality and Licence Agreement (CLA). A CADENCE OPUS
design kit is available to allow the generation of the layout including
electronic and non-electronic parts. The kit includes an extended DRC and an
extended parameter extractor (from layout to netlist) distinguishing electronic
and non-electronic parts. A netlist is generated allowing an electrical
simulation where bridges, cantilevers and membranes are considered as a
resistance, and a behavioural simulation where these structures are represented
by a model in the language HDLA/ELDO from ANACAD. Other CMOS processes, surface
micromachining, GaAs processes, LIGA, Quartz micromachining will be introduced
gradually.

Cost:

1 500 FF/mm2, 5 mm2 minimum charge.
15 samples returned including 5 samples packaged.

Documents and files available upon request:

  * CMP Micromachines Program (October 1995).
  * ES2 CMOS 1.0 micron Front-side Bulk Micromachining Design Rules, upon
    signature of a CLA.
  * Design kit including extended DRC and extended extractor, upon signature of
    a CLA.
  * Cell library, being continuously expanded, upon signature of a CLA.

Next runs:

  * 7 December 1995
  * 19 February 1996
  * 9 April 1996
  * 17 June 1996

Information:
CMP
B. Courtois/J.M Karam
38031 Grenoble Cedex
FRANCE
Tel.: +33 76 57 46 20
Fax: +33 76 47 38 14
e-mail: cmp@archi.imag.fr
www: http://tima-cmp.imag.fr

CMP is a broker for a number of technologies (prototyping and low volume
production). Since 1981, 140 Institutions from 30 countries have been served,
more than 1600 projects have been prototyped through 130 runs, 15 semiconductor
houses have been interfaced.

1) Integrated circuits:

  * 1.2 micron, 1.0 micron, 0.7 micron CMOS DLM from ES2
  * 1.2 micron, 0.8 micron CMOS DLP/DLM from AMS
  * 1.2 micron, 0.8 micron BiCMOS DLP/DLM from AMS
  * 0.5 micron CMOS TLM from SGS-Thomson/France Telecom (JESSI)
  * 0.6 micron GaAs from VITESSE
  * 0.2 micron GaAs HEMT from PHILIPS (up to 90 GHz)

2) Micromachining

3) CAD software:

CADENCE, COMPASS, VIEWLOGIC, TANNER, ... .

4) MCM and 3D packaging:

  * MCM-L and MCM-LD from Montpellier Technologies/IBM
  * MCM-C (HTCC) from Montpellier Technologies/IBM
  * MCM-C (PCM, LTCC, Thick/thin film on alumina) from DASSAULT Electronique/
    SOREP
  * 3D-MCM (MCM-V) from Thomson-CSF DOI.

5) Design kits: available from most of the processes to:

ALLIANCE, DOLPHIN, MAGIC, MENTOR GRAPHICS, CADENCE, EXEMPLAR, MDS, SYNOPSYS,
COMPASS, TANNER, VIEWLOGIC