durusmail: mems-talk: run-in/run-out errors in alignment of photomasks
run-in/run-out errors in alignment of photomasks
2011-05-13
2011-05-13
2011-05-13
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2011-05-19
run-in/run-out errors in alignment of photomasks
Edouard Duriau
2011-05-13
Hi Wei,

Of course the baking process can have an impact, but I don't think this is
the root cause. Bake plate and process conditions do have a specific
fingerprint, but such big scaling error is nost likely to come from the
exposure tool itself.

Such scaling can arise from mask deformation itself (and I do think that
quartz mask could help), but I doubt that this is the only root cause since
I suspect that the exposure time is limited, right?

In general, this is caused by aberrations of the lenses. These aberrations
are commonly modeled by Zernike fringe polynomials. In the case of scaling,
several zernike coefficients can impact scaling. In order to determine which
ones (i.e. the order of the polynomial), you should check if it is
linear/quadratic/higher order over the full wafer.

Hope this helps!

Kind regards,

*Edouard Duriau*|* ASML Netherlands BV *|* CS-ABS Imaging Systems*



On Fri, May 13, 2011 at 4:56 AM, Wei Tang  wrote:

> Hi, everyone
>
> I am having run-in/run-out problem when I try to align the photo-mask
> to the the wafer. The second layer pattern on the mask seems to be
> slightly scaled (larger ) compare with the first layer pattern on the
> wafer, which give a 1um alignment offset over a 1cm square wafer. The
> two layers mask pattern are made on the same mask plate, and the
> environment temperature remains the same for the two exposures. I am
> wondering what could be the sources of this error? I baked the wafer
> at 110C after first exposure, because I was using a AZ5214 image
> reversal process. Could this baking have any effect to scale the
> pattern on the wafer? It seems to me although the wafer expands during
> baking, it will shrink to the exact original size after it is fully
> cooled, unless the above PR layer have a relative shift with respect
> to the wafer during this process.
>
> I hope to reduce the alignment error below 0.5um or even smaller. One
> suggestion is to use quartz plate (instead of soda lime I am using
> now) to improve the accuracy of the mask. I am wondering will quartz
> material help in this case?
>
> Any comment would be appreciated!
>
> Thanks,
>
> Wei
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