durusmail: mems-talk: Through Silicon Via using Non-Bosch recipe
Through Silicon Via using Non-Bosch recipe
2017-05-03
2017-05-04
-|EXT|- Through Silicon Via using Non-Bosch recipe
2017-05-04
Through Silicon Via using Non-Bosch recipe
Orozaliev Ajymurat Nurdinovich
2017-05-06
Hi Ashok,

First of all, the scallop size(sidewall roughness) might be dependent on the
sidewall profile of your mask. Considering your mask layer has <20 nm sidewall
RMS roughness,it is possible to get very smooth sidewalls.
Try to use SF6:C4F8 simultaneously, 1:2 ratio(25:50 sccm) and lower power,~800W
ICP with RF ~15W.
We were able to achieve <10 nm RMS sidewall roughness.

But the etch rate will be quite low,~300 nm/min.

Good luck!
Sent from my iPhone

> On May 4, 2017, at 5:16 AM, Lijun Yan  wrote:
>
> Hi, Ashok
> What is the aspect ratio of your TSV structure? You may try SF6+O2 process
with oxide as mask.
> The profile will be sacrificed although with non-bosch process.
> Regards!
> Lillian
>
> -----Original Message-----
> From: Ashok . [mailto:ashok@sitarindia.com]
> Sent: Wednesday, May 03, 2017 3:46 PM
> To: mems-talk@memsnet.org
> Subject: [mems-talk] Through Silicon Via using Non-Bosch recipe
>
> Dear mems-talk community,
>
> I am using SPTS(Orbotech) DRIE ICP etcher for etching TSV but using Bosch
process. since my device process' requirements are with scallops < 20nm,  I am
looking for a recipe (non-bosch) which uses both Etch and Depo steps
simultaneously.
> Could you please guide me in this about the possibility of developing the
same?
>
> Thanks in advance,
> Regards,
>
> Ashok Kumar D,
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