durusmail: mems-talk: RE: Help on processes
RE: Help on processes
1999-08-24
1999-08-25
1999-08-25
1999-08-31
RE: Help on processes
Mirza Andy
1999-08-25
Dear Dr. Zhou,

The problem you describe is a common problem in MEMS when dealing
high-aspect ratio microstructures, namely the uniform coating of photoresist
over severe topography.

Recently, we have published an article in the magazine "High-Density
Interconnect" that discusses this issue and presents results on a patented
spray coating technique developed by Electronic Visions, Inc. called
OmniSpray technology. This spray coating techique was specifically developed
for MEMS applications.

For a copy of this article T. Luxbacher and A. Mirza, High-Density
Interconnect, May 1999, Vol 2, No 5, p36-41 please e-mail info@elvisions.com
(mailto:info@elvisions.com )

Regards,
Andy Mirza
Technology Manager
Electronic Visions, Inc.
3701 E. University Drive
Ste. 300
Phoenix, AZ 85034
Tel: (602) 437-9492
Fax: (602) 437-9435
E-mail: a.mirza@elvisions.com
Web: http://www.elvisions.com


=====================================================
> -----Original Message-----
> From: Xiaochuan Zhou [SMTP:xczhou@xeotron.com]
> Sent: Friday, August 13, 1999 9:43 PM
> To:   MEMS@ISI.EDU
> Subject:      Help on processes
>
> Dear colleagues:
>
> I would like to get suggestions on fabrication processes.  I am designing
> a
> process for fabricating a device containing three levels of etched
> features
> on a silicon wafer.  The features include basins of about 10 micron deep,
> trenches of about 50 micron wide and 50 micron deep, and narrow
> through-holes (etched all-the-way through the silicon wafers of 300 to 450
> micron thick).  I am considering the use of Si(110) substrates and KOH wet
> etching for achieving the arrow through-holes.  It seems that I have to go
> through at least three etching steps in order to achieve three levels of
> depth.  My difficulty is at the photoresist coating between the steps.
> Any
> one of my device features would cause sufficient corrugations on the
> substrate surface and make uniform photoresist coating impossible.  I
> would
> like to hear any suggestions on the overall process design, suitable
> etching
> processes (wet or dry), and any tricks and/or materials that may make the
> fabrication easier.
>
> Thank you very much.
>
>
>
> Xiaochuan Zhou, Ph.D.
> Xeotron Corporation
> E-mail xczhou@xeotron.com
>
>


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