Dr. Zou,

We are probably all wondering just how narrow your through etches have
to be.
If you can use a dry etcher (DRIE), then I think Brian Hubert's
suggestion will work well. In my experience you can spin resist over
10µm dry-etched deep cavities. However, over anisotropically wet etched
features it will be difficult to spin, due to the very sharp corners.
Another "trick" are so-called nested masks. Basically, Chris Foreman
and Ralf G. Longwitz suggested this technique with increasing thickness
of oxide in and resist, respectively. Now, that can be tricky,
especially if your etching process eats away the mask as well.

Instead, one can use different masking layers. For example, oxide and
resist for dry etching.
- deposit 1st layer (oxide) and pattern it (for 2nd etch)
- deposit and pattern 2nd layer (resist) for (1st etch)
Then you etch the 2nd (deeper) etch a little, strip the resist and etch
both patterns. It is somewhat tricky to get the deeper etch depth
right, if the etch rate is not constant. This is true in plasma systems
with loading, and also the etch chemistry does change when masking
layer changes. So you need to find the respective etch rates for each
scenario.

Wet etching is more straightforward since the etch rate is constant.
Possible masking layers are nitride and oxide, each of which can be
selectively patterned and removed.

There is even a trick to etch each cavity to its final depth
individually:
- deposit nitride, pattern 2nd etch inverse (dark field)
- deposit oxide, pattern 1st etch
- etch 1st pattern
- thermally oxidize, this protects the just etched cavity (the region
under the nitride doesn't get oxidized)
- strip nitride (phosphoric acid), this leaves the oxide mask intact
etch 2nd pattern

I just learned about this from Martin Schmidt, and MIT has a patent on
this.

This nested mask approach can be extended to more steps, if you find
more masking layers that can be selectively patterned and removed, e.g.
metals.
Good luck,

Alexander Hoelke, Ph.D.
Massachusetts Institute of Technology
Microsystems Technology Laboratory



> > -----Original Message-----
> > From:       Xiaochuan Zhou [SMTP:xczhou@xeotron.com]
> > Sent:       Friday, August 13, 1999 9:43 PM
> > To: MEMS@ISI.EDU
> > Subject:    Help on processes
> >
> > Dear colleagues:
> >
> > I would like to get suggestions on fabrication
> processes.  I am designing
> > a
> > process for fabricating a device containing three
> levels of etched
> > features
> > on a silicon wafer.  The features include basins
> of about 10 micron deep,
> > trenches of about 50 micron wide and 50 micron
> deep, and narrow
> > through-holes (etched all-the-way through the
> silicon wafers of 300 to 450
> > micron thick).  I am considering the use of
> Si(110) substrates and KOH wet
> > etching for achieving the arrow through-holes.  It
> seems that I have to go
> > through at least three etching steps in order to
> achieve three levels of
> > depth.  My difficulty is at the photoresist
> coating between the steps.
> > Any
> > one of my device features would cause sufficient
> corrugations on the
> > substrate surface and make uniform photoresist
> coating impossible.  I
> > would
> > like to hear any suggestions on the overall
> process design, suitable
> > etching
> > processes (wet or dry), and any tricks and/or
> materials that may make the
> > fabrication easier.
> >
> > Thank you very much.
> >
> >
> >
> > Xiaochuan Zhou, Ph.D.
> > Xeotron Corporation
> > E-mail xczhou@xeotron.com
> >
> >
>
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