if you are looking to have an even etch rate on both sides, the best solution to your problem is to use wafers with both sides of wafer polished so that the surface roughness is similar. This would be easier than trying to manage the oxide thickness or change the oxide methods ( compensating with higher thickness oxide on back) If the base wafers are single side polished with a KOH etch backside and depending on the lapping compound and the original etch method/process (time/temp), the backside will be extremely rough reducing the oxide thickness uniformity on the back. With your controlled etch of the front side, the high points (low oxide) areas of the back will etch through much faster. Another base wafer alternative would be to use a good a acid etched substrate instead of a caustic etched one. The problem here is obtaining acid etch wafers which fewer suppliers can provide and this will only improve, but still not be as good as using double side polished wafers. Ken Soumen Das wrote: > > Hello > We are doing the silicon etching through windows simultaneously from both, > front and back sides using KOH solution. The masking material for silicon > etching is thermally grown 1 micron thick silicon dioxide. We observed that > front side oxide remains for very long time in KOH soluton. However, back side > oxide does not stay for long time. It etch out very fast than front side > oxide. > The wafer backside roughness is much higher than frontside surface. How can we > improve the backside oxide quality to be used as masking material for KOH > etching > Do anyone has any solution? > Thanks > Dr. Soumen Das > Sr. Scientific Officer > Microelectronics Centre > Dept. of Electronics & ECE > Indian Institute of Technology > Kharagpur 721 302, India > email: sou@ece.iitkgp.ernet.in > Phone: +91-3222-81914 (O) > +91-3222-81475 (Lab) > +91-3222-81915 (R) > Fax: +91-3222-755303/777190 > _______________________________________________ > mems-talk@memsnet.org mailing list: to unsubscribe or change your list > options, visit http://fab.mems-exchange.org/mailman/listinfo/mems-talk > Hosted by the MEMS Exchange, providers of MEMS processing services. > Visit us at http://www.mems-exchange.org/ -- Kmbh Associates 4968 Charter Road Rocklin, CA 95765 U S A 510-714-5055 Efax- 510 217 4421 or 561 658 6136 High Purity Float Zone and Specialty CZ Silicon for Power, IR and Mirror Optics, Optoelectronics, MEMS, SOI, and other Semiconductor applications. Service in SOI, Polishing SSP and DSP. Quartz, Glass, Pyrex and Borofloat Wafer Supply. Anodic Bonding. SOG, SOS.