> As an experiment, or unintentionally, has > anyone encountered PLASMA CHARGE DAMAGE to their CMOS > CHIPS (fully fabricated) when a MEMS Structure, > along-side the CMOS Circuit, IS BEING RIE PLASMA ETCHED? > > I would appreciate some form of feedback. If the answer is yes, and a > paper has been written about the experience, please let me know. Phil, charging damage is possible at all stages of the CMOS fabrication, even on the finished chip, unless it's specifically designed against it (reverse protection diodes). One obvious source, the pulling of an electron current through the substrate, is usually countered by magnetic electron confinement and floating substrates. Less obvious, but equally damaging, is electron/ion current uniformity over the substrate - non-uniformity can lead to local charges which discharge through your CMOS chip. You'll find some literature and monitoring wafers at http://www.charm-2.com/ Also, you've got an expert inside BAE Systems. Talk to Dr. Russ Morgan (Southampton Eng. Manager), and give him my regards ;-) good luck klaus (TEEL) Tokyo Electron Europe Limited PVD Process Support (ex MRC) Klaus Beschorner Tel +49-7033-45683 Drosselweg 6 Fax +49-7033-45631 71120 Grafenau, Germany Mobile +49-174 315 7754