durusmail: mems-talk: Underetch of SOI
Underetch of SOI
2003-01-16
2003-01-16
2003-01-17
2003-01-17
2003-01-20
Underetch of SOI
Blunier, Stefan
2003-01-16
Dear collegues
I'm working on SOI wafers developing free hanging structures. During
underetch with HF (48%) I noticed that the etch velocity of the two
Si-SiO2 interfaces is different. SiO2 thickness is 3 microns. Production
is bonding of thick device layer and lapping polishing to a thickness of
50 microns.
The etch velocity at the interface SiO2-device layer is faster than the
etch velocity at the interface SupportSi-SiO2. To etch all the oxide
under a 50 micron beam I have to overetch to long so my anchors
underetch to much.
Does anybody know this problem and how to avoid it?
Thanks
Stefan


_____________________________________________________
Dr. Stefan Blunier
ETH Zuerich, Zentrum CLA G 21.2
Institute of Mechanical Systemes
Tannenstrasse 3
CH - 8092 Zuerich
Switzerland

Phone:   +41 1 632 77 64
Fax:  +41 1 632 11 45
e-mail: blunier@imes.mavt.ethz.ch
__________________________________________________


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