hello,

we dice samples (about 1cm sq) without pattern from
SOI wafer (purchased) and fusion bonded wafer with 1um
burried oxide. Apply DC voltage (10~180V) across
device layer and handle layer silicon (both p-type,
1~10 Ohm-cm). Measure the current at different voltage
level and found some samples have resistance over tens
of MOhm even over 100V but some will deteriorate
rapidly to only KOhm at high voltage. For MOhm
samples, the current is stable.  For those samples
with low resistance, the current increase gradually to
certain level then suddenly drop but pick up gradually
again in a cyclic fashion.  the poor oxide insulation
quality and cyclic behavior will cause future device
stability problem even if handle layer is grounded.
what may be the cause, trapped mobile ion, oxide
contamination? any proper way to check oxide
insulation quality of burried oxide in SOI wafer or
oxide film on si?

andrew