durusmail: mems-talk: Islands found during SU-8 soft-bake
Islands found during SU-8 soft-bake
Islands found during SU-8 soft-bake
郑瑞麟(Ruilin Zheng)
2008-07-04
Thank you for your advices!

I tried to clean the wafer with oxygen plasma follow the instruction from
Dr.Jiguet.
And the surface looks quite clean. But the result turned out to be
disappointed, the islands are still on the surface. The humidity in our lab
is around 60-70% all these days.
The SU-8 I use is SU-8 2150 from microchem, and I used to use an bottle of
expired su-8 100. Just for few samples on 2 inch wafer, there is no islands
on su-8 100 samples. And I spin-coated on a Ti-sputtered 4 inch wafer once,
and found no island. Before, I just used the 2 inch silicon wafer for most
of the time. Islands were found from time to time, but not very often and
not on every 2inch wafer. The diameter or size for islands are from 5mm-1cm,
and the patterns within islands are hard to be developed after exposed.
The islands appear near 65 Celsius degree, and the glass temperature for
unexposed su-8 is around 55 Celsius. Does this glass temperature have some
relation with the islands?

Forgot one thing, I put a glass plate (flat and leveled) on the hot plat
just for easy removal of cool-down sample.
Many hands will make light work, thank you again for your kind help!

2008/7/4 Gareth Jenkins :

> Islands (divots or dimples) is a common problem which has been
> discussed before many times with not much of a conclusive outcome!
> I personally think there are three main causes:
>
> 1). Wafer contamination or poor prep. which sounds most likely in your
> case. Wafers should be soaked in clean Piranha or conc. H2SO4 for at
> least an hour and then thoroughly dehydrated (I do 220deg C on a
> hotplate for 30-60mins).
>
> 2). Bubbles or particles in the SU-8 itself. Bubbles can be alleviated
> by placing the (closed) bottle in an oven at 60deg C for 1 hour -
> allow to cool before using. The particles can be due to build up of
> SU-8 around the neck of the bottle when pouring directly from it.
>
> 3). High humidity. I am not 100% sure about this but would like to
> hear opinions from others. Recently I have been having poor results
> using identical protocols I have had success with before but in a
> cleanroom in which the humidity is often around 55%. SU-25 is just
> about tolerable but we have virtually given up on SU-8 2100. SU-2 is
> also quite poor.
>
> Has anyone else noticed a link between high humidity and divots (and
> generally poor wafer coverage)?
>

Best Regards,

郑瑞麟

Ruilin Zheng

Address:
Pen-Tung Sah MEMS Research Center,
Xiamen University, Xiamen,361005,
P.R.China
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