durusmail: mems-talk: cryo-etch paramaeters
cryo-etch paramaeters
2008-11-30
cryo-etch paramaeters
seyeda@ualberta.ca
2008-11-28
Hi all,

I am doing a silicon cryo-etch process. My processes before the final
cryo-etch step are as follows:

1- start with a silicon wafer that has about 500 nm thermal oxide
layer on its surface.
2- lithography steps using positive resist(HPR 504)
3- RIE to remove sio2
4- Branson etching
5- final step cryo-etching

I get my wafer covered with a black gunck in the middle of it at the
end of cryo step.

In my wafer I don't have too many objects or features and a lot
of it is bare silicon to be etched. I suspect this is the source of my
problem. Does anybody have an idea how to solve this issue? I greatly
appreciate your suggestions and comments.

Thank you

Syd
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