durusmail: mems-talk: Oxidation of KOH etched Si wafers
Oxidation of KOH etched Si wafers
2009-12-21
2009-12-22
2009-12-22
2009-12-23
Oxidation of KOH etched Si wafers
Kuijpers, Peter
2009-12-21
Good morning,

During KOH etch a patterned low stress SiN layer was used as etching mask.
Afterwards this SiN layer was etched for about 4hr in H3PO4 at 140°C. As next a
wet-oxidation process took place on the Si, but we did get a very non-uniform
and very thin SiO2 layer (target was 100nm, measured thickness 16nm?). Our
theory is that there is still a (very) thin layer of SiN present. Could this be
the cause and is there another way to selectively remove this low stress SiN
layer in a well controlled way (HF and RIE are not possible).
Looking forward to your answers.

Best regards,
Peter Kuijpers
MiPlaza Technology Laboratories
Philips Research Europe
High Tech Campus 04
Postbox HTC-4-1
5656 AE Eindhoven
The Netherlands
Tel.: +31 402743667
         +31 612507027
Email: p.e.m.kuijpers@philips.com

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