durusmail: mems-talk: RIE for SiO2
RIE for SiO2
2010-02-02
2010-02-03
RIE for SiO2
Prömpers, Michael
2010-02-04
Why do you use PMMA for the mask? AZ5214 is much more comfortable for RIE-
etching and possible to adjust and reproduce down to 1µm without a problem....we
etch down to 600-800nm => if you are interested, I can send the parameters...

Cheers,
Michael


-----Ursprüngliche Nachricht-----
Von: mems-talk-bounces@memsnet.org [mailto:mems-talk-bounces@memsnet.org] Im
Auftrag von antwi nimo
Gesendet: Mittwoch, 3. Februar 2010 08:46
An: General MEMS discussion
Betreff: Re: [mems-talk] RIE for SiO2

RIE is possible but the etch rate is very slow in SiO2.  I do not no if it is
impossible by your process to just use Resist as mask then pattern the resist
with lithography and etch the oxide in BHF. For oxide thickness of  0..5µm that
will virtually be anisotropic and there will not be major difference with RIE.

I hope it helps,

Nimo

--- On Tue, 2/2/10, renil kumar  wrote:

From: renil kumar 
Subject: [mems-talk] RIE for SiO2
To: mems-talk@memsnet.org
Date: Tuesday, February 2, 2010, 2:23 AM

Hi All

                 I am trying to transfer the pattern over 500nm thick layer of
SiO2 thermally grown over a planar Si wafer using RIE. The minimum feature size
is 1um. Right now we have CF4 gas with us. I am looking for best RIE parameters
to obtain anisotropic etching of SiO2 (500nm). i.e. RIE power gas flow rate mask
thickness and vaccuum etc. I am using PMMA as the hard mask. Has anyone tried it
before. If so please share me the details. Any suggestions will be appreciated
well. Thanks in advance.

Renil
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