durusmail: mems-talk: Non-uniform silicon etching
Non-uniform silicon etching
Non-uniform silicon etching
Sebastian R Freeman
2014-07-31
Hi everyone,

Maybe someone could shed some light onto a problem I've been seeing etching
2-in silicon wafers (configuration 100). I am trying to etch a microarray
of pillars on the silicon wafer using a positive photoresist (Shipley 1813)
in the RIE. The pillars are about 8 microns in diameter and 32 microns
apart (center-to-center spacing). The process I have been using is 50
scc/min CF4, 10 scc/min O2, and 400 mTorr. I have used 100, 200, and 300 W
and 5 mins and 2.5 mins. At 300 W for 5 min, the wafer came out very
scratched up looking. Under the microscope, the surface was very rough.
Around some pillars, the surface had many pits and holes. Sometimes, this
pattern would continue along a whole role of pillars. The 300 W was the
extreme case. I observed similar thing at other powers, but to a much
lesser degree. I currently am not able to use SF6, nor do I have access to
a deep RIE. My goal is to etch at least 6-7 microns and have a clean wafer
come out. I have able to obtain etch rates between 0.18-0.5 microns/min
within the different experiments.

Again, if anyone has any insight they can share, I would really appreciate
it.

*Sebastian Freeman*
*Ph.D Student*

*Binghamton University*

*Thomas J. Watson School of Engineering*
*Department of Bioengineering*
*Office: Biotechnology Building 2629*
*E-mail: sfreema1@binghamton.edu *
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