Community Response
                                      to
                            MAGIC CAD USER CONCERNS

The April message entitled 'MAGIC CAD USER CONCERNS' described a
feature-placement discrepancy between what is seen in Magic using the ':cif
see' command and what is in the Magic-created CIF file. This discrepancy is due
to the way Magic interprets its data, the way the commands are specified in the
technology file, and the way the design is digitized. More importantly, this
discrepancy can be hidden from the designer via different orientations of the
designed cells. With the advent of new technologies such as MEMS where users
are more frequently modifying technology files, this potential error needs to
be understood to avoid testing problems such as low yield, high leakage
currents, and behavior that is difficult to replicate.

The responses to the April message were sparse and varied, ranging from those
who no longer do custom designs to those who could not explain high leakage
currents and believe this may be the problem to those who agree that an
independent DRC is advisable. Michael Godfrey (Stanford) appropriately stated
the situation as follows:

    "We are looking at your report of placement problems in Magic. However, a
    rule that we have always followed here is that no design generated in Magic
    is EVER submitted for fab without independent DRC. We normally use LEDIT
    for this. And, we usually find problems.

    While enough "tuning" of the technology files can sometimes produce MOSIS
    DRC correct results, this cannot be relied on. All users should know this.

    It is also true that DRC correct CIF read into Magic and simply written out
    again will typically contain DRC violations, most commonly in well
    contacts. A standard example of this is the Tanner cell libraries.

    It is helpful that you have isolated this specific error, and it may be
    possible to fix it. However, my general rule is simple: Never trust Magic,
    or any other one design tool. That is what independent DRC and LVS are all
    about."

The MOSIS SCMOS technology file does not exhibit the phenomena described in the
April message. As evident by the many modifications to it as specified in the
beginning of the file, this version appears to be 'proven in.' Lets hope the
designer is aware of how to design successfully with a given technology file as
well as the intent of any technology file modifications and all its
ramifications before each design is initiated. And again, checking the
resulting cif file with another CAD design tool and performing a drc is
recommended.

A special thank you to all those who took the time to respond to this inquiry
and to those who can/will benefit from this learning experience.

Respectfully,

Janet Marshall
NIST
Semiconductor Electronics Division
IC Technology Group