durusmail: mems-talk: {111} surface roughness
{111} surface roughness
{111} surface roughness
Johan van der Linden
1997-05-06
I'm using a bulk KOH-etching process to produce submount structures of
which the revealed {111}-planes are used as a mirror. The envisaged
application requires to etch completely through the wafer. At the botom
region of the wafer (30-50 micron), however, the {111}-planes exhibit an
increased surface roughness and different orientation. I use double side
polished silicon with PECVD nitride on both sides.
Is there anyone who has experienced this effect or might suggest a way to
avoid it?
Kind regards,

Johan.
 ______________________________________________

  Johan E. van der Linden
  University of Gent (Belgium)
  Department of Information Technology (INTEC)
  St-Pietersnieuwstraat 41
  B-9000 Gent

  Tel       + 32 9 264 33 16
  Fax       + 32 9 264 35 93

  Email     johan.vanderlinden@intec.rug.ac.be

 ______________________________________________


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