Hi,

For that type of etching alignment is extreemly critical ... I'm not sure
what you are trying to do, however to achieve smooth vertical walls
alignment error should be less than 1 degree.  There are some papers by
Mattias Vangbo from Uppsala University (I think in Sweden)on this topic.

Regards,

Mike Rosa.



At 11:50 19/08/98 +0000, you wrote:
> Dear MEMS
> I have worked (110) silicon wafer KOH etching  verticaly for
>acceleration sensor.
>  But vertical KOH etching was not conformed. I want to know the
>method for  vertical KOH etching.
>  I wish your advices and good informastions.
> Thanks for reading my e-mail.
>email adress; mhnam@palgong.kyungpook.ac.kr
>
>
>