Hi Chris,

There is magnetic energy loss in your n-type silicon and the silicon oxide
layer is too thin. If you want to decrease the parasitic cap, there are
several ways.

1. use very thick sio2
2. use air bridge as isolating layer
3. use glass substrate instead of silicon.

As I know, the third method is very good. I use this method. The paracitic
cap is only 0.1-0.2pf

Thanks



2010/9/28 Christian Engel 

> Hello people,
>
> At the moment we are trying to build planar inductivities on an n-type
> Si-wafer. Currently, there is an SiO2-insulator of about 50nm thickness
> between substrate and the structured, sputtered Cu-Layer that forms the
> inductivity.
>
> Unfortunately, a parasitic capacitance of some dozen nF can be measured
> while trying to measure the completed inductivities. Can anybody give me an
> idea for being able to explain this problem?
>
> Thanks in advance and best regards, Chris