Not enough information.

1) How is the inductance measurement being done?  DC, or at a frequency?
If at a frequency, which frequency?

2) Ditto the capacitance measurement:  DC, at frequency, which
frequency?

3) What is the doping in the semiconductor?

4) What are the lateral dimensions of the inductor (coils?) at the SiO2
interface?

5) Where are the electrodes in the measurement setup?

6) Is the substrate grounded or floating?

It is easy to imagine coupling between coils (leading to mutual
inductance), through the insulator and the underlying conductive
substrate.  It is also easy to imagine unexpected or unusual results,
which depend upon the measurement technique and the measurement circuit.
However, there is not enough information to assist with debugging the
problem.

Al Henning
Director of MEMS Technology
NanoInk, Inc.

Chris Engel wrote:
------------------
Hello people,

At the moment we are trying to build planar inductivities on an n-type
Si-wafer. Currently, there is an SiO2-insulator of about 50nm thickness
between substrate and the structured, sputtered Cu-Layer that forms the
inductivity.

Unfortunately, a parasitic capacitance of some dozen nF can be measured
while trying to measure the completed inductivities. Can anybody give me
an idea for being able to explain this problem?

Thanks in advance and best regards, Chris