First, have you tried to etch through this layer or did you etch based
on a calculated time/thickness ?  If you have not tried to etch through,
it could be that your device thickness was over 50um. If you have, then
there could be a glass layer over the oxide or an implant like that used
in products that are produced by Soitec or Ibis. If you used a BESOI
wafer using a 'conventional' oxide only bond (EV , Karl Zuess or other
equipment) where there is only two bare silicon wafers and Si02 BOX
layer, and the device, oxide and total thickness' were correct, I do not
know what you may be seeing.

Ken

> Abdullah Tashtoush wrote:
>
> Dear MEMS research,
> when TMAH or EDP used as an etchant, and  SOI 40 um wafer was used, I
> figured out that the etch stop and it didn't hit the buried Silicon
> dioxide and a layer with thickness  based up on SEM photo ~10-15um, do
> you have any idea about this issue , if so would you please tell me
> what this layer is, and how can we get rid of it, and  really I
> appreciate  if you tell me about the reason that causes this layer.
> thanks a lot.
>
> BigBangwidth
> the exabit netOpticalTM company
>
> Abdullah Tashtoush
> MEMS Process Engineer
> Tel: (780) 490-4800 Ext. (227)
> Cell:(780) 953-0702
> Fax: (780) 430-8545
> atashtoush@BigBangwidth.com
> www.BigBangwidth.com
>
>

--
Ken Smith

Kmbh Associates

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