for a standard CMOS cleanroom.
that materials are allowed and not allowed?

I know that CMOS cleanroom usually do not use liftoff process.
Is there any other process are not prefered in CMOS cleanroom, but
frequently used in other lower level lab?

best

Yu CHEN

On Fri, May 14, 2010 at 4:39 AM, Robert Black  wrote:

> I think it means it can be fabricated using CMOS tools and materials. Bulk
> machining is not CMOS compatible, some surface machining is.
>
> But I'm guessing myself,
>
> Robert